Stabilized monostable delay multivibrator or one-shot apparatus

ABSTRACT

A transistor (FIG. 1) or an integrating amplifier (FIG. 2), controlled by a signal representing the duty cycle of a one-shot, controls the value of a voltage at one end of a resistor, the other end of which is connected to the one-shot timing capacitor. The charging current for this capacitor flows through this resistor during the excited periods of the one-shot, with a value dependent upon that of the voltage at the first-mentioned resistor end. The transistor or amplifier controls the value of this voltage as required to make the sum of the lengths of the excited periods over an extended period be a fixed percentage of the length of the extended period, and hence to make the average duty cycle constant at a desired value.

United States Patent Lowe [ 1 Feh.29,1972

[54] STABILIZED MONOSTABLE DELAY MULTIVIBRATOR OR ONE-SHOT APPARATUS [52] US. CL ..307/273, 307/265, 328/58, 328/207, 330/30 D [51] Int. Cl. ..H03k 3/10 [58] Field of Search ..307/265, 273; 328/58, 207; 330/30 D [56] References Cited UNITED STATES PATENTS 3,419,735 12/1968 Seer, Jr. et a1. ..307/273 3,533,005 12/1970 3,531,659 9/1970 2,708,239 5/1955 Durio, Jr ..307/26$ X Dano ..,.307/265 X [5 7] ABSTRACT A transistor (FIG. 1) or an integrating amplifier (FIG. 2), controlled by a signal representing the duty cycle of a one-shot, controls the value of a voltage at one end of a resistor, the other end of which is connected to the one-shot timing capacitor. The charging current for this capacitor flows through this resistor during the excited periods of the one-shot, with a value dependent upon that of the voltage at the first-mentioned resistor end. The transistor or amplifier controls the value of this voltage as required to make the sum of the lengths of the excited periods over an extended period he a fixed percentage of the length of the extended period, and hence to make the average duty cycle constant at a desired value.

6 Claims, 2 Drawing Figures ONE SHOT STABILIZED MONOSTABLE DELAY MULTIVIBRATOR OR ONE-SHOT APPARATUS BACKGROUND OF THE INVENTION The present invention relates generally to monostable delay multivibrators, hereinafter referred to as one-shot apparatus or one-shots. Specifically, the invention relates to one-shots which are provided with means for causing their duty cycles to be regulated in a desired manner.

There is often a need in the electronic circuit art for a oneshot which is relatively simple and inexpensive, and which thus may not have a high degree of timing stability, bu? which must nevertheless provide operation with a precisely constant, or fixed, average duty cycle, even in the presence of variations or changes in the repetition rate at which the one-shot is triggered. By the term duty cycle is meant the ratio of the length of a period in which the one-shot is in its excited or timing state to the length of the succeeding period in which the oneshot is in its quiescent or unexcited state. By the term constant average duty cycle is meant operations such that, over a relatively long or extended period of time, which is quite long compared to the periods of the one-shot, the latter is in its excited state for a total time which is a desired fixed percentage of the length of the entire period.

For example, by the term equal, or 50/50, average duty cycle is meant operation such that, over an extended period of time, the one-shot is in its excited state for a total time which is equal to the total time in which it is in its unexcited state, and thus is equal to one-half of the length of the entire period. Further, by the term 70 percent average duty cycle is meant operation such that, over an extended period of time, the oneshot is in its excited state for a total time which is equal to 70 percent of the length of the entire period.

Accordingly, there is often a need for a one-shot which is relatively simple, and which thus may well not have a high degree of stability or absolute timing accuracy, but which will, when repeatedly actuated or triggered over an extended period of time, have a constant average duty cycle and hence be in its excited state for precisely a fixed percentage of the duration of the extended time period, even though the frequency of triggering may vary during this period. An example of such a need is that experienced in regard to the oneshots required in the apparatus of the copending US. Pat. application of Tyler and Lowe, Ser. No. 1,427, filed on Jan. 8, 1970, which one-shots must exhibit a precisely equal average duty cycle. However, all of the one-shots of the prior art with which I am familiar which have the needed high degree of accuracy with respect to their duty cycles are unduly complex and costly.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide an improved one-shot apparatus which is relatively simple and inexpensive, but which nevertheless includes means for stabilizing the duty cycle of the one-shot in a desired manner. A further object of the invention is to provide such apparatus which is so constructed that it exhibits a duty cycle which averages out over a relatively long or extended period of time to be constant with an extremely high degree of accuracy, notwithstanding reasonable or in range variations in the value of the one-shot timing capacitor and/or in the rate at which the one-shot is triggered.

In accomplishing the foregoing and other desirable objects, the novel one-shot apparatus according to the present invention embodies means to utilize an operating signal in the oneshot, which is representative of the duty cycle thereof, to derive a control signal for means which controls the value of the charging voltage and current for the one-shot timing capacitor as necessary to compensate for error in the average duty cycle, or departure from the desired constant average duty cycle condition. In this way, the average duty cycle over an extended period of time is maintained very accurately constant, notwithstanding the occurrence, during this period, of

changes, within the dynamic range of the apparatus, in the capacitance of the timing capacitor, and/or in the triggering frequency.

BRIEF DESCRIPTION OF THE DRAWING A better understanding of the present invention may be had from the following detailed description when read in connection with the accompanying drawing, wherein FIG. 1 is the schematic circuit diagram of a regulated oneshot apparatus according to the present invention; and

FIG. 2 is a schematic circuit diagram of a modified form of the FIG. 1 apparatus which is arranged to employ a different regulating means and integrated circuitry.

DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS The Apparatus of FIG. 1

The novel one-shot apparatus illustrated in FIG. 1 includes a conventional one-shot circuit and means for regulating the timing or lengths of the excited periods thereof to stabilize the one-shot duty cycle. The one-shot circuit includes a first transistor 1, a second transistor 2, resistors 3, 4, 5, and 6, a timing capacitor 7, triggering terminals 8 and 9, Q output terminals l0 and 11, O output terminals 12 and 13, and conductors interconnecting these elements in the following manner. The collector of the transistor 1 is connected through the resistor 3 to a positive supply conductor 14, and the emitter of the transistor 1 is connected directly to a negative supply, or common, conductor 15. The conductors 14 and 15 are connected to respective supply terminals 16 and 17 which, in turn, are arranged to be connected across a suitable source of DC supply or energizing voltage, not shown.

The base of the transistor 1 is connected directly to the trigger terminal 8, and is connected through the resistor 4 to the collector of the transistor 2. This collector is also connected through the resistor 5 to the conductor 14. The trigger terminal 9 is connected directly to the conductor 15, as is the emitter of the transistor 2.

The base of the transistor 2 is connected to the collector of the transistor 1 through the capacitor 7 by a connection which extends from the last-mentioned base to a point 18, and through the capacitor 7 to a point 19, at which point the resistor 3 is connected to the collector of the transistor 1. The point 18 is also connected through the resistor 6 to a point 20 at which a voltage is present which is regulated or controlled by the regulating means of the FIG. 1 apparatus as will be explained hereinafter.

To complete the description of the one-shot circuit portion of the FIG. 1 apparatus, it is noted that the Q output terminal 10 is connected to the collector of the transistor 2, while the O output terminal 12 is connected to the collector of the transistor 1 at the point 19. The remaining respective Q and 6 output terminals 11 and 13 are connected directly to the conductor 15.

The regulating portion of the FIG. 1 apparatus includes a resistor 21, a transistor 22, an averaging capacitor 23, resistors 24, 25, and 26, and conductors interconnecting these elements in the following manner. The point 19, at the collector of the transistor 1, is connected through the resistor 21 to the base of the transistor 22, and the capacitor 23 is connected between the last-mentioned base and the conductor 15. The resistors 24 and 25 are connected in series between the conductors 14 and 15, and the emitter of the transistor 22 is connected to the junction between the resistors 24 and 25.

The collector of the transistor 22 is connected to the point 20, which in turn is connected through the resistor 26 to a positive supply terminal 27. The latter is arranged to be connected to a source of DC supply voltage, not shown, which voltage is more positive with respect to the conductor 15 than is the voltage on the conductor 14..

Operation of the H6. 1 One-Shot Circuit Considering first the conventional operation of the one-shot of MG. 1 without the action of the regulating portion, and thus assuming that the voltage at the point 20 is fixed at approximately the voltage of the conductor 14, let it also be assumed that the apparatus is presently in the unexited state. Under this condition, current flows through the resistor 6 into the base of the transistor 2, causing the latter to be saturated or on. As a result, there is essentially no voltage between the collector of the transistor 2 and the emitters of both of the transistors, whereby there is essentially no output signal produced between the Q terminals 10 and 11, and no flow of current into the base of the transistor 1. As a result, the latter is off, its collector is essentially at the voltage of the conductor 14, and an output signal is produced between the 6 terminals 12 and 13. In this unexcited state, there is a steady voltage across the capacitor 7, between the points 18 and 19, and a steady charge on the capacitor 7.

The one-shot remains in the unexcited state as just described until a positive triggering or trigger signal or pulse is applied between the terminals 8 and 9 from a suitable source, not shown. Such a trigger signal makes the base of the transistor 1 positive with respect to the emitter of this transistor, causing a current to flow into the last-mentioned base. This causes the transistor 1 to turn on.

As soon as the foregoing takes place, the voltage on the collector of the transistor 1, which is the voltage at the point 19, drops to essentially that of the conductor 15. This instantaneously pulls down the voltage at the point 18, with respect to the conductor 15, by the same amount, due to the fact that the voltage across the capacitor 7 cannot change instantaneously. This, in turn, makes the point 18 quite negative with respect to the conductor 15. The resulting fall in the voltage between the base and the emitter of the transistor 2 causes the latter to turn off. Thus, the application of a positive trigger signal between the terminals 8 and 9 practically instantly causes the transistor 1 to turn on and the transistor 2 to turn off, and hence causes the one-shot to assume its excited state.

As long as the transistors l and 2 remain in the foregoing conditions, and the one-shot remains in the excited state, there is essentially no output signal produced between the Q terminals 12 and 13 across the on transistor 1. However, an output signal is now produced between the Q tenninals 10 and 11 across the off transistor 2. Also, due to the fact that the voltage on the collector of the transistor 2 is now substantially equal to the voltage of the conductor 14, current flows through the resistors and 4 into the base of the transistor 1 and holds the latter on after the trigger signal has disappeared.

As the one-shot remains in the excited state, the voltage at the point 20 causes a so-called charging current to flow from the point 20, through the resistor 6, and into the capacitor 7, due to the fact that the voltage at the point 18 has been pulled down to be negative with respect to the conductor 15 as noted above. This current causes the voltage at the point 18 to rise exponentially at a rate determined solely by the resistance of the resistor 6 and the capacitance of the capacitor 7, assuming, as noted above, that the point 20 is being held at a fixed voltage with respect to the conductor 15. This action continues until the voltage at the point 18 has become sufficiently positive with respect to the conductor 15 and the emitter of the transistor 2 that the latter is turned on.

At the instant at which the transistor 2 turns on, the voltage on its collector drops essentially to that of the conductor 15. This terminates the output signal between the Q terminals and 1!, removes the hold-on base current from the transistor 1, causing the latter to turn off, and thus terminates the excited state or excited period of the one-shot and returns the latter to the unexcited state.

Since the point 19 is now no longer being held substantially at the voltage of the conductor 15, a socalled capacitor resetting current now flows through the resistor 3 and into the capacitor 7. This causes the voltage at the point 19, and hence the output signal between the 1 terminals 12 and 13, to rise expoentially to that of the conductor M once more. The rate of this voltage rise is determined by the values of the resistor 3 and the capacitor 7, and is usually of the order of 10 times the rate at which the voltage of the point 18 rose du ring the excited state. Accordingly, the reappearance of the 0 output signal occurs, for all practical purposes, as the excited period ends and the one-shot passes from the excited state to the unexcited state.

It is seen from the foregoing, therefore, that, upon being triggered, the one-shot assumes its excited state, and remains in this state for a period of time determined by the values of the resistor 6 and the capacitor 7, assuming that the voltage at the point 20 is constant.

Operation of FIG. 1 Regulating Portion As was noted previously herein, the purpose of the regulating means or portion of the FIG. 1 apparatus is to cause the average duty cycle of the apparatus to be constant. That is, when the one-shot is repeatedly triggered over a period of time which is many times longer than one of the periods of the one-shot, the regulating means causes the total time during which the one-shot is in its excited state to be precisely equal to a fixed percentage of the length of the long time period. The relationship or principle which makes this action possible is that the length of any period in which the one-shot is in its excited state is a function of not only the values of the resistor 6 and the timing capacitor 7 during that period, but also of the average magnitude or value of the voltage at the point 20 with respect to the conductor 15 during that period. As was previously noted, it is this voltage at the point 20 which produces the charging current which flows into the capacitor 7 during the excited period of the one-shot. Accordingly, the larger the value of this voltage, the larger the average value of the charging current, the more quickly the voltage at the point 18 rises to the turn-on value for the transistor 2 during the excited period, and the shorter the length of this period.

To the end of using the foregoing relationship to effect the desired regulation of the one-shot duty cycle, the resistor 21 and the capacitor 23 are arranged to cooperate to average the transistor 1 collector voltage at the point 19 to produce across the capacitor 23 a voltage which is a representation of the one-shot duty cycle. This voltage controls the operation and the collector current of the transistor 22, which, in turn, controls or adjusts or regulates the value of the voltage at the point 20, and hence the timing capacitor charging current and the lengths of the excited periods of the one-shot.

The FIG, 1 apparatus is capable of providing operation with any desired value of average duty cycle. However, in order to simplify the present description, the remainder thereof deals with the FIG. 1 apparatus as though the component values thereof have been so chosen as to provide operation with an equal, or 50/50, average duty cycle. It should be noted however that the selection of this particular value of average duty cycle is by way of illustration and example only, and is not by way of limitation.

Continuing the description of the FIG. 1 apparatus, it is noted that the transistor 22 is biased by the resistors 24 and 25 in such a manner that, when the average duty cycle has the desired equal value, the resulting value of the voltage across the capacitor 23 causes the transistor 22 to maintain the voltage at the point 20 at whatever value causes the lengths of the excited periods to be such as to maintain the equal average duty cycle.

If the excited periods of the one-shot become shorter than is required to maintain the average duty cycle at the desired equal value, such an occurrence is made manifest by a corresponding increase in the voltage across the capacitor 23. This causes a corresponding increase in the collector current of the transistor 22. This, in turn, lowers the voltage at the point 20 by a corresponding amount as necessary to so reduce the capacitor 7 charging current, and hence lengthen the excited periods of the one-shot, as to return the average duty cycle to the desired equal value.

Similarly, if the excited periods of the one-shot become too long, there is a corresponding decrease in the voltage across the capacitor 23, decrease in the collector current of the transistor 22, increase in the voltage at the point 20, increase in the capacitor charging current, and decrease in the lengths of the excited periods.

It is seen, therefore, that a departure from the desired average duty cycle changes the voltage across the capacitor 23, the collector current of the transistor 22, the voltage at the point 20, the timing capacitor charging current, and the lengths of the excited periods as necessary to correct the average duty cycle error which has been sensed.

As will be apparent from the foregoing explanation, the value of the capacitor 23 must be sufficiently large to cause the voltage across this capacitor to change slowly compared to the rate at which the voltage at the point 19 cycles as the oneshot is repeatedly triggered.

The FIG. 1 apparatus can be made to operate with some other desired value of average duty cycle, other than the equal value of the foregoing description, simply be resetting the value of the bias established by the resistors 24 and 25 to an appropriate new value. This new bias value is that which causes the transistor 22 to regulate the voltage at the point 20 as required to cause the lengths of the excited periods to be such as to maintain the new desired value of average duty cycle.

It has been found in practice that substantial variations in the actual capacitance value of the timing capacitor 7 do not prevent the FIG. 1 apparatus from maintaining the average duty cycle precisely constant as just described, as long as said capacitance variations are not so excessive as to require the apparatus to operate outside of its dynamic operating range. Thus, the accuracy and stability of the FIG. 1 apparatus are essentially not dependent on any capacitor value remaining constant.

Similarly, it has been found in practice that the FIG. 1 apparatus continues to maintain a constant average duty cycle with the same high degree of accuracy even though the rate at which the one-shot is triggered varies, as long as such triggering rate variations are not so excessively rapid and/or wide as to require operation of the apparatus outside of its dynamic range.

The Apparatus of FIG. 2

The one-shot apparatus of FIG. 2 is a form of the FIG. 1 apparatus which differs from the latter in that it is arranged to make use of integrated circuitry, and in that it employs a somewhat different circuit for the regulating means which regulates the one-shot timing for stabilizing the one-shot duty cycle. However, the FIG. 2 apparatus operates according to the same principle as does the FIG. 1 apparatus, in that the regulating means of the FIG. 2 apparatus, like that of the FIG. 1 apparatus, provides one-shot operation with a highly accurately maintained constant average duty cycle by regulating the value of the charging current of the one-shot timing capacitor as necessary to maintain a constant average duty cycle.

To this end, the FIG. 2 apparatus includes a conventional oneshot portion consisting of a conventional integrated circuit one-shot package or unit 28, a resistor 29, a timing capacitor 30, triggering terminals 31 and 32, 0 output terminals 33 and 34, and 6 output terminals 35 and 36. The terminals 31, 33, and 35 are connections on the unit 28, which also has a positive supply connection 37, a negative supply, or common, connection 38, and external timing capacitor connections 39 and 40.

The foregoing one-shot elements are interconnected in the following manner. The positive supply connection 37 is connected to a positive supply terminal 41, and the common connection 38 is connected by a common conductor 42 to a negative supply terminal 43. The terminals 41 and 43 are arranged to be connected across a suitable source of DC supply voltage as in the case of the FIG. 1 terminals l6 and 17. The trigger terminal 32, the 0 output terminal 34, and the 6 output terminal 36 are all connected to the conductor 42. The capacitor 30 is connected between the connections 39 and 40, and the resistor 29 is connected between the connection 39 and a point 44 at which the regulating means of the FIG. 2 apparatus controls the voltage and the charging current for the capacitor 30 as will be explained hereinafter. Accordingly, the point 44 of the FIG. 2 apparatus corresponds to the point 20 of the FIG. 1 apparatus.

The regulating means of the FIG. 2 apparatus includes a conventional integrated circuit operational amplifier 45, an integrating capacitor 46, resistors 47, 48, 49, 50 and 51, diodes 52, 53, and 54, and conductors interconnecting these elements in the manner described below. The amplifier 45 has an inverting input connection 55, a noninverting input connection 56, an output connection 57, and energizing voltage connections 58 and 59 which are arranged to be connected to a suitable source of energizing voltage, not shown, for the amplifier 45.

The noninverting input connection 56 of the amplifier 45 is connected through the resistor 47 to the conductor 42, and is connected through the diode 52 and the resistor 48 in series to a positive supply terminal 60. The latter is arranged to be connected to a source of DC supply voltage, not shown, which voltage is more positive with respect to the conductor 42 than is the voltage of the terminal 41.

The inverting input connection 55 of the amplifier 45 connected through the diodes 53 and 54 in series to the Q positive output connection 35 of the one-shot. The junction between the diodes 53 and 54 is connected by the resistors 49 and 50 in series to the supply terminal 60. The resistor 50 is made adjustable to permit errors due to component tolerances to be adjusted out.

The capacitor 46 connects the amplifier output connection 57 to the inverting input connection 55, and the latter is connected to the conductor 42 by the resistor 51. Accordingly, the amplifier 45 is connected with the capacitor 46 to operate as an integrator. The amplifier output connection 57 is also connected to the point 44 by a conductor 61.

Operation of the FIG. 2 Apparatus The basic operation of the FIG. 2 apparatus is identical to that of the FIG. 1 apparatus as previously described herein. Thus, when the FIG. 2 one-shot is in its unexcited state, there is no output signal produced between the Q te'rmigals 33 and 34, but an output signal is produced between the Q terminals 35 and 36 which makes the terminal 35 positive with respect to the terminal 36. Also, in this unexcited state, there is a fixed voltage across the capacitor 30, between the connections 39 and 40, and a steady charge on the capacitor 30.

The apparatus remains in this unexcited state until a trigger signal is applied between the terminals 31 and 32 which makes the terminal 31 positive with respect to the terminal 32. When this occurs, the oneshot switches at once to its excited state, the 6 output signal disappears, a Q output signal appears which makes the terminal 33 positive with respect to the ter minal 34, and the voltages at the connections 39 and 40 drop suddenly as did the voltages at the points 18 and 19 of the FIG. ll apparatus when the latter assumed its excited state.

As the FIG. 2 apparatus remains in the excited state, the voltage at the point 44 causes a timing capacitor charging current to flow through the resistor 29 which raises the voltage at the connection 39 exponentially. This action continues until the last-mentioned voltage has become sufficiently high to switch the apparatus back into the unexcited state. When this occurs, the 0 output signal between the terminals 33 and 34 disappears, and the 6 output signal between the terminals 35 and36 reappears.

The rate of the aforementioned rise of the voltage on the connection 39, and hence the length of the excited period of the one-shot, depend upon the average values ofthe voltageat the point 44 and the resulting capacitor charging 56km flowing through the resistor 29 during this period. As in the case of the FIG. 1 apparatus, these values are controlled or regulated by the regulating means of FIG. 2 as necessary to maintain the desired value of average duty cycle. The specific manner in which this regulation is effected by the FIG. 2 apparatus is explained in the following description, wherein it is assumed by way of example, as in the case of the description of the FIG. 1 apparatus, that the component values have been so chosen as to provide operation with an equal average duty cycle.

Whenever the one-shot is in its excited state, the resulting absence of an output signal between the 6 output terminals 35 and 36 permits a current to flow down from the terminal 60 and through the resistors 50 and 49 and the diode 54 to the terminal 35 and thence to the common conductor 42. The diode 53 at this time is reverse biased and prevents the voltage at the inverting input terminal 55 from being affected.

Whenever the one-shot is in its unexcited state, however,

1 the resulting output voltage produced between the Q terminals 35 and 36 reverse biases the diode 54, whereby the above-noted current through the resistors 50 and 49 is no longer diverted through the diode 54 and the one-shot 2 output, but instead flows as the current i1 through the diode S3 and into the junction connected to the inverting input connection 55. Thus, the current i1 flows only when the one-shot is in the unexcited state.

The resistors 47 and 48 cause a steady reference current 12 to flow into the junction connected to the noninverting input connection 56. This places a fixed bias voltage on the connection 56. The diode 52 serves to compensate for the effects of thermal variations on the operation of the diode 53.

For the purposes of the present invention, the values of the resistors 47 and 51 are made to be equal, and the amplifier which is chosen for use as the amplifier 45 is one having a high input impedance. As a result, the amplifier 45 is balanced, and thus maintains its output voltage between the connection 57 and the conductor 42 steady, when and only when the average value ofil is equal to the value of i2.

Additionally, since the apparatus is to maintain the average duty cycle of the one-shot equal, the sum of the mean value of the resistor 50 and the value of the resistor 49 is made to be equal to one-half of the value of the resistor 48. Thus, the average value of i1 is equal to the value ofiZ, and the amplifier 45 is balanced, when and only when i1 flows for one-half of the time. Now this occurs only when the average lengths of the excited and unexcited periods are equal or, in other words, when the average duty cycle is equal. Therefore, when and only when this equal average duty cycle condition exists, 1'! flows for one-half of the time, the average value of i1 is equal to the value of i2, and the amplifier 45 is balanced.

The output voltage of the amplifier 45 is also the voltage at the point 44, the value of which voltage determines the value of the charging current for the timing capacitor 30. Thus, when the one-shot average duty cycle is equal and the amplifier is balanced, the value of the voltage at the amplifier output connection 57 and at the point 44 is that which produces a length for the excited periods of the one-shot which yields this equal average duty cycle.

If the excited periods of the one-shot become shorter than is required to maintain the desired equal average duty cycle, the current i1 flows for more than one-half of the time. As a result, the average value of i1 increases and becomes greater than the value of :2. This unbalances the amplifier 45 and causes the value of the voltage at the point 44 to decrease, and to continue to decrease, until the excited periods have been so lengthened as to have restored the equal average duty cycle, reduced the average value of i1 so as to have restored equality between this average value and the value of i2, and restored the balanced condition of the amplifier 45.

If the excited periods of the one-shot become too long, the current 1! flows for less than one-half of the time. This makes the average value of i1 less than the value of :2, which unbalances the amplifier 45 in the direction opposite to that in which unbalance is produced when the excited periods are too short. This causes the value of the voltage at the point 44 to increase, and to continue to increase, until the excited periods have been so shortened as to have restored the equal average duty cycle and the balanced condition of the amplifier 45.

Accordingly, the output voltage of the amplifier 45, which is the voltage at the point 44, stabilizes at that value which maintains such a value of timing capacitor charging current and excited period duration as to give an equal average duty cycle and an average value of 11 which is equal to i2. The values of the resistor 51 and the capacitor 46 are made to be such that the time constant established by these components is very long compared to the lengths of the periods of the one-shot, in order to make the output voltage of the amplifier 45 responsive to only long term variations in the difference between 11 and i2.

It is seen, therefore, that a departure from the desired average duty cycle changes the average value of i] to make it different from the reference value of i2, unbalances the amplifier 45 in the appropriate direction, and changes the voltage at the point 44, the timing capacitor charging current, and the lengths of the excited periods as necessary to correct the average duty cycle error which has been sensed.

By way of illustration and example, and not by way of limitation, it is noted that a model of the FIG. 2 apparatus which was found to operate satisfactorily as described above employed the following components, component values, and other parameters:

Item Value One-shot 28 Texas lnstruments Type SN74I2IN T.T.l monosrable Resistor 29 10 K9 Capacitor 30 6800 pf. Voltage 41-43 +5 volts Amplifier 45 Fairchild Type #A'Ml Capacitor 46 I pf. Resistor 47 2 KO Resistor 48 2O Kl'l Resistor 49 9.5 KI! Resistor 50 l Kt] Resistor 51 2 K9 Diodes 52, 53, and 54 1N4] 48 Voltage 58-59 -l5, +15 volts Voltage 60-42 +25 volts For a triggering frequency of 10 kHz. (excited period of 50 usec. for equal duty cycle), the voltage between the point 44 and the conductor 42 was approximately +5 volts.

As in the case of the FIG. 1 apparatus, the continued proper operation of the FIG. 2 apparatus does not require that the capacitance of the capacitor 30 or the frequency of triggering remain constant, as long as variations in these values do not require operation outside of the dynamic range of the apparatus. In other words, within the dynamic range of the apparatus, the latter will seek the desired constant value of average duty cycle for various timing capacitor values or triggering frequencies. For example, apparatus employing the values given above was found to exhibit only a 0.001 percent change in excited period length for a 20 percent change in the value of the capacitor 30, and to provide the same duty cycle accuracy for a triggering frequency change of over :50 percent.

As in the case of the FIG, I apparatus, the FIG. 2 apparatus can readily be made to operate with a constant average duty cycle other than the equal average duty cycle assumed for the apparatus in the foregoing explanation. That is, the FIG. 2 apparatus is capable of providing operation with any desired value of average duty cycle. Arranging the FIG. 2 apparatus to maintain a particular value of average duty cycle can be effected simply by making the ratio of the resistances of the resistors 50 49 and 48 have a value commensurate with the desired value of average duty cycle.

In conclusion, it is seen that the improved apparatus according to the present invention provides highly accurate one-shot operation with a desired value of average duty cycle by the use of relatively simple means which responds to duty cycle error to regulate the one-shot timing capacitor charging current, and the lengths of the excited periods of the one-shot, as necessary to correct said error.

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. ln combination with a monostable delay multivibrator circuit including a timing capacitor and arranged, when supplied with a repetitive trigger signal, to provide operation consisting of a first group of repeated periods in which said circuit is in an excited state, each of said periods being preceded and followed by a period of a second group in which said circuit is in an unexcited state, said circuit also including first means connected to said capacitor to pass a charging current therethrough only throughout each of said excited periods, the average value of said current during any of said excited periods determining the length of that period and being determined by the value of the voltage at a first point in said first means, said circuit also including a second point at which a signal appears only throughout the periods of one of said groups, regulating means for regulating said voltage and current to maintain the average duty cycle of said circuit at a constant value over extended periods oftime and hence to maintain the sum of the lengths of said excited periods over an extended period of time equal to a desired percentage of the length of said extended period, said regulating means including an integrating operational amplifier having an inverting input, a noninverting input, an output, and an integrating capacitor connected between said output and said inverting input,

reference means connected to said noninverting input to maintain a voltage at the latter of a substantially fixed reference value,

second means connected to a source of current, to said inverting input, and to said second point and controlled by said signal thereat to cause a first current to flow from said source only throughout the periods of one of said groups, which current produces a voltage at said inverting input which substantially balances said voltage at said noninverting input when said average duty cycle has said constant value, and

a connection between said output and said first point to cause said amplifier to maintain the voltage at said first point at a value which is dependent upon the difference between the voltages at said inverting and noninverting inputs and which causes the lengths of said excited periods to be such as to make said average duty cycle have said constant value.

2. Apparatus as specified in claim 1, wherein said second means includes first resistance means connected between said source of current and said inverting input and through which resistance means said first current flows, said reference means includes second resistance means connected between said source and said noninverting input,

said voltage at said noninverting input is maintained by the flow of a second current through said second resistance means, and

the resistance values of said first and second resistance means are such that the average value of said first current is substantially equal to the value of said second current only when said average duty cycle has said constant value.

3. Apparatus as specified in claim 1, wherein said second means includes a resistor and a first diode connected in series between said source of current and said inverting input,

said second means includes a second diode connected between said second point and the junction between said suring a constant average duty cycle over extended periods of time, comprising circuit means including a timing capacitor and arranged, when supplied with a repetitive trigger signal, to provide operation consisting of a first group of repeated periods in which said circuit means is in an excited state, each of said periods being preceded and followed by a period of a second group in which said circuit means is in an unexcited state, said circuit means also including first means connected to said capacitor to pass a regulated charging current thereto only throughout each of said excited periods, the average value of said current during any of said excited periods determining the length of that period and being determined by the value of the voltage at a first point in said first means, said circuit means also including a second point at which a signal appears only throughout the periods of one of said groups,

an integrating operational amplifier having an inverting input, a noninverting input, an output, and an integrating capacitor connected between said output and said inverting input,

reference means connected to said noninverting input to maintain a voltage at the latter of a substantially fixed reference value,

second means connected to a source of current, to said inverting input, and to said second point and controlled by said signal thereat to cause a first current to flow from said source only throughout the periods of one of said groups, which current produces a voltage at said inverting input which substantially balances said voltage at said noninverting input when the sum of the lengths of said excited periods over an extended period of time is equal to a desired percentage of the length of said extended period and said average duty cycle thus has said constant value, and

a connection between said output and said first point to cause said amplifier to maintain the voltage at said first point at a value which is dependent upon the difference between the voltages at said inverting and noninverting inputs and which causes the lengths of said excited periods to be such as to make said average duty cycle have said constant value.

5. Apparatus as specified in claim 4, wherein said second means includes first resistance means connected between said source of current and said inverting input and through which resistance means said first current flows,

said reference means includes second resistance means con nected between said source and said noninverting input,

said voltage at said noninverting input is maintained by the flow of a second current through said second resistance means, and

the resistance values of said first and second resistance means are such that the average value of said first current is substantially equal to the value of said second current only when said average duty cycle has said constant value.

6. Apparatus as specified in claim 4, wherein said second means includes a resistor and a first diode connected in series between said source of current and said inverting input,

said second means includes a second diode connected between said second point and the junction between said resistor and said first diode, and

said second diode permits said first current to flow through said resistor and said first diode only when said signal is present at said second point. 

1. In combination with a monostable delay multivibrator circuit including a timing capacitor and arranged, when supplied with a repetitive trigger signal, to provide operation consisting of a first group of repeated periods in which said circuit is in an excited state, each of said periods being preceded and followed by a period of a second group in which said circuit is in an unexcited state, said circuit also including first means connected to said capacitor to pass a charging current therethrough only throughout each of said excited periods, the average value of said current during any of said excited periods determining the length of that period and being determined by the value of the voltage at a first point in said first means, said circuit also including a second point at which a signal appears only throughout the periods of one of said groups, regulating means for regulating said Voltage and current to maintain the average duty cycle of said circuit at a constant value over extended periods of time and hence to maintain the sum of the lengths of said excited periods over an extended period of time equal to a desired percentage of the length of said extended period, said regulating means including an integrating operational amplifier having an inverting input, a noninverting input, an output, and an integrating capacitor connected between said output and said inverting input, reference means connected to said noninverting input to maintain a voltage at the latter of a substantially fixed reference value, second means connected to a source of current, to said inverting input, and to said second point and controlled by said signal thereat to cause a first current to flow from said source only throughout the periods of one of said groups, which current produces a voltage at said inverting input which substantially balances said voltage at said noninverting input when said average duty cycle has said constant value, and a connection between said output and said first point to cause said amplifier to maintain the voltage at said first point at a value which is dependent upon the difference between the voltages at said inverting and noninverting inputs and which causes the lengths of said excited periods to be such as to make said average duty cycle have said constant value.
 2. Apparatus as specified in claim 1, wherein said second means includes first resistance means connected between said source of current and said inverting input and through which resistance means said first current flows, said reference means includes second resistance means connected between said source and said noninverting input, said voltage at said noninverting input is maintained by the flow of a second current through said second resistance means, and the resistance values of said first and second resistance means are such that the average value of said first current is substantially equal to the value of said second current only when said average duty cycle has said constant value.
 3. Apparatus as specified in claim 1, wherein said second means includes a resistor and a first diode connected in series between said source of current and said inverting input, said second means includes a second diode connected between said second point and the junction between said resistor and said first diode, and said second diode permits said first current to flow through said resistor and said first diode only when said signal is present at said second point.
 4. Stabilized monostable delay multivibrator apparatus ensuring a constant average duty cycle over extended periods of time, comprising circuit means including a timing capacitor and arranged, when supplied with a repetitive trigger signal, to provide operation consisting of a first group of repeated periods in which said circuit means is in an excited state, each of said periods being preceded and followed by a period of a second group in which said circuit means is in an unexcited state, said circuit means also including first means connected to said capacitor to pass a regulated charging current thereto only throughout each of said excited periods, the average value of said current during any of said excited periods determining the length of that period and being determined by the value of the voltage at a first point in said first means, said circuit means also including a second point at which a signal appears only throughout the periods of one of said groups, an integrating operational amplifier having an inverting input, a noninverting input, an output, and an integrating capacitor connected between said output and said inverting input, reference means connected to said noninverting input to maintain a voltage at the latter of a substantially fixed reference value, second means connected to a source of current, to said inverting input, and to said second point and controlled by said signal thereat to cause a first current to flow from said source only throughout the periods of one of said groups, which current produces a voltage at said inverting input which substantially balances said voltage at said noninverting input when the sum of the lengths of said excited periods over an extended period of time is equal to a desired percentage of the length of said extended period and said average duty cycle thus has said constant value, and a connection between said output and said first point to cause said amplifier to maintain the voltage at said first point at a value which is dependent upon the difference between the voltages at said inverting and noninverting inputs and which causes the lengths of said excited periods to be such as to make said average duty cycle have said constant value.
 5. Apparatus as specified in claim 4, wherein said second means includes first resistance means connected between said source of current and said inverting input and through which resistance means said first current flows, said reference means includes second resistance means connected between said source and said noninverting input, said voltage at said noninverting input is maintained by the flow of a second current through said second resistance means, and the resistance values of said first and second resistance means are such that the average value of said first current is substantially equal to the value of said second current only when said average duty cycle has said constant value.
 6. Apparatus as specified in claim 4, wherein said second means includes a resistor and a first diode connected in series between said source of current and said inverting input, said second means includes a second diode connected between said second point and the junction between said resistor and said first diode, and said second diode permits said first current to flow through said resistor and said first diode only when said signal is present at said second point. 